Course overview
- Study period
- Semester 2, 2025 (28/07/2025 - 22/11/2025)
- Study level
- Undergraduate
- Location
- St Lucia
- Attendance mode
- In Person
- Units
- 2
- Administrative campus
- St Lucia
- Coordinating unit
- Elec Engineering & Comp Science School
Mathematical models of electrical components, circuits and systems. Time and frequency response. Issues in building complex systems from subsystems, including feedback. Signal theory and filter design. Theoretical investigations, substantial case studies and laboratory experiments.
ELEC2004 introduces the concept of the frequency domain and its application to electric circuits. The frequency domain opens up a whole new way of intuitively analysing and designing electrical and electronic circuits. Understanding how circuits respond to different frequencies is the basis for understanding modern communications and signal processing, analogue electronics, instrumentationᅠand power systems. The frequency domain also explains the behaviour of circuits in the time domain, providing the basis for automatic control system design and switching electronics. The concepts learnt in this class provide the basis for the intuitive understanding of circuits, signals and systems that are the key to effective engineering analysis and design.
Course requirements
Assumed background
Fundamental knowledge of circuit elements from first year electrical engineering. Mathematical knowledge of matrices and differential equations.
Prerequisites
You'll need to complete the following courses before enrolling in this one:
ENGG1300
Companion or co-requisite courses
You'll need to complete the following courses at the same time:
MATH2001 and MATH2010
Course contact
Course staff
Lecturer
Timetable
The timetable for this course is available on the UQ Public Timetable.
Aims and outcomes
At the end of ELEC2004:
1. Students should be able to design electrical engineering circuits involving active and passive components and analyse them using frequency domain techniques.
2. Students should be capable of advanced mathematical techniques to efficiently design and implement electrical engineering circuits which serve as the basis of modern communication, control systems, signal processing, analogue electronics and power systems.
Learning outcomes
After successfully completing this course you should be able to:
LO1.
Explain and be able to apply linear circuit theorems and circuit analysis methods such as mesh current and node voltage
LO2.
Explain operating principle of operational amplifiers and be able to build and analyse the circuits containing operational amplifiers
LO3.
To be able to evaluate and analyse the time responses of switching circuits containing a resistor, a single capacitor and/or an inductor
LO4.
Analyse the response of a resistor / inductor /capacitor circuits to an AC excitation of a single frequency
LO5.
Analyse the power in resistor / inductor /capacitor circuits excited by a single frequency of AC
LO6.
Intuitively generate the frequency response (Bode plot) of a known circuit and be able to interpret the frequency response (Bode plot) of an unknown circuit
LO7.
Build and analyse electronic circuits with resistors, capacitors and inductors
LO8.
Be able to effectively use Laplace and Fourier transforms in circuit analysis
LO9.
Explain the concept of transfer functions and be able to use them in circuit analysis
LO10.
Design circuits to generate transfer functions
LO11.
Build and verify electronic circuits to implement transfer functions
LO12.
Be able to collaboratively work for design and implement filters
Assessment
Assessment summary
Category | Assessment task | Weight | Due date |
---|---|---|---|
Paper/ Report/ Annotation |
Design Challenge Report
|
24% |
30/10/2025 4:00 pm |
Tutorial/ Problem Set |
Homework Assignments
|
16% |
Homework 1 15/08/2025 4:00 pm Homework 2 29/08/2025 4:00 pm Homework 3 10/10/2025 4:00 pm Homework 4 24/10/2025 4:00 pm |
Examination |
In-Semester Theory Examination
|
20% |
8/09/2025 2:00 pm |
Examination |
Final Exam
|
40% |
End of Semester Exam Period 8/11/2025 - 22/11/2025 |
A hurdle is an assessment requirement that must be satisfied in order to receive a specific grade for the course. Check the assessment details for more information about hurdle requirements.
Assessment details
Design Challenge Report
- Team or group-based
- Mode
- Written
- Category
- Paper/ Report/ Annotation
- Weight
- 24%
- Due date
30/10/2025 4:00 pm
Task description
A 15 page report jointly written with a lab partner on the solution to the Design Challenge, including theoretical grounding, design basis, experimental results and discussion. Details of the report format are available for download from the course Blackboard page. To be submitted on Thursday of week 13, by 4 pm. Due date: October 30, 4pm via Blackboard.
Only electronic submission is required. Electronic submission is to be made through Blackboard Turnitin. Hardcopy submission is not required. Only one submission per group is required.
The Design Challenge Report has been designed to be challenging, authentic and complex. Whilst students may use AI and/or MT technologies, successful completion of assessment in this course will require students to critically engage in specific contexts and tasks for which artificial intelligence will provide only limited support and guidance. A failure to reference generative AI or MT use may constitute student misconduct under the Student Code of Conduct. To pass this assessment, students will be required to demonstrate detailed comprehension of their written submission independent of AI and MT tools.
Submission guidelines
Submission of Design Challenge report will be through Blackboard.
Deferral or extension
You may be able to apply for an extension.
The maximum extension allowed is 7 days. Extensions are given in multiples of 24 hours.
Extensions are limited to 7 days as feedback will be provided within 7-14 days.
Late submission
A penalty of 10% of the maximum possible mark will be deducted per 24 hours from time submission is due for up to 7 days. After 7 days, you will receive a mark of 0.
Homework Assignments
- In-person
- Mode
- Written
- Category
- Tutorial/ Problem Set
- Weight
- 16%
- Due date
Homework 1 15/08/2025 4:00 pm
Homework 2 29/08/2025 4:00 pm
Homework 3 10/10/2025 4:00 pm
Homework 4 24/10/2025 4:00 pm
Task description
There will be 4 Homework Assignments to be completed individually by each student. The Homework problem sheets will be available on Blackboard as per the following schedule. The due dates are also listed. The completed handwritten solutions to the Homework Assignments are to be scanned and uploaded through Blackboard:
Homework 1: available on Blackboard on Friday, August 8; Submission due date: August 15, 4 pm.
Homework 2: available on Blackboard on Friday, August 22; Submission due date: August 29, 4pm.
Homework 3: available on Blackboard on Friday, September 26; Submission due date: October 10, 4pm.
Homework 4: available on Blackboard on Friday, October 17; Submission due date: October 24, 4pm.
Each Homework Assignment will contain 2-3 problems. Problems will be based on the lectures, practicals, and applied class/workshop exercises.
Artificial Intelligence (AI) and Machine Translation (MT) are emerging tools that may support students in completing this assessment task. Students may appropriately use AI and/or MT in completing this assessment task. Whilst students may use AI and/or MT technologies, successful completion of assessment in this course will require students to critically engage in specific contexts and tasks for which artificial intelligence will provide only limited support and guidance. Students must clearly reference any use of AI or MT in each instance. A failure to reference generative AI or MT use may constitute student misconduct under the Student Code of Conduct.
Submission guidelines
Homework submission through Blackboard assignment links.
Deferral or extension
You may be able to apply for an extension.
The maximum extension allowed is 7 days. Extensions are given in multiples of 24 hours.
Marked assignments with feedback and/or detailed solutions with feedback will be released to students within 7-14 days.
Late submission
A penalty of 10% of the maximum possible mark will be deducted per 24 hours from time submission is due for up to 7 days. After 7 days, you will receive a mark of 0.
In-Semester Theory Examination
- Hurdle
- Identity Verified
- In-person
- Mode
- Written
- Category
- Examination
- Weight
- 20%
- Due date
8/09/2025 2:00 pm
Task description
The exam will comprise of 3-4 problems based on the circuits part of the course. This exam will be timed, on-campus, invigilated and closed-book. All students will attempt the exam at the same time. The exam venue will be advised closer to the exam date.
This assessment task is to be completed in-person. The use of generative Artificial Intelligence (AI) or Machine Translation (MT) tools will not be permitted. Any attempted use of AI or MT may constitute student misconduct under the Student Code of Conduct.
Hurdle requirements
A passing grade can only be obtained when the combined mid-semester exam mark (out of 20) and the final exam mark (out of 40)ᅠis at least 40% of the sum of available marks (that is, at least 24 out of 60 are required to obtain a passing grade). Where the overall exam mark is less than 40%, the grade will be capped at a 3 (Fail).Exam details
Planning time | 10 minutes |
---|---|
Duration | 90 minutes |
Calculator options | (In person) Casio FX82 series only or UQ approved and labelled calculator |
Open/closed book | Closed book examination - no written materials permitted |
Exam platform | Paper based |
Invigilation | Invigilated in person |
Submission guidelines
Deferral or extension
You may be able to defer this exam.
Final Exam
- Hurdle
- Identity Verified
- In-person
- Mode
- Written
- Category
- Examination
- Weight
- 40%
- Due date
End of Semester Exam Period
8/11/2025 - 22/11/2025
- Other conditions
- Secure.
Task description
The exam will comprise of multi-part system design problems covering material from the signals and systems portion of the course, and will also incorporate concepts from the circuits part of the course.
This assessment task is to be completed in-person. The use of generative Artificial Intelligence (AI) or Machine Translation (MT) tools will not be permitted. Any attempted use of AI or MT may constitute student misconduct under the Student Code of Conduct.
Hurdle requirements
A passing grade can only be obtained when the combined mid-semester exam mark (out of 20) and the final exam mark (out of 40)ᅠis at least 40% of the sum of available marks (that is, at least 24 out of 60 are required to obtain a passing grade). Where the overall exam mark is less than 40%, the grade will be capped at a 3 (Fail).Exam details
Planning time | 10 minutes |
---|---|
Duration | 120 minutes |
Calculator options | (In person) Casio FX82 series only or UQ approved and labelled calculator |
Open/closed book | Closed book examination - no written materials permitted |
Exam platform | Paper based |
Invigilation | Invigilated in person |
Submission guidelines
Deferral or extension
You may be able to defer this exam.
Course grading
Full criteria for each grade is available in the Assessment Procedure.
Grade | Cut off Percent | Description |
---|---|---|
1 (Low Fail) | 0 - 19 |
Absence of evidence of achievement of course learning outcomes. |
2 (Fail) | 20 - 46 |
Minimal evidence of achievement of course learning outcomes. |
3 (Marginal Fail) | 47 - 49 |
Demonstrated evidence of developing achievement of course learning outcomes |
4 (Pass) | 50 - 64 |
Demonstrated evidence of functional achievement of course learning outcomes. |
5 (Credit) | 65 - 74 |
Demonstrated evidence of proficient achievement of course learning outcomes. |
6 (Distinction) | 75 - 84 |
Demonstrated evidence of advanced achievement of course learning outcomes. |
7 (High Distinction) | 85 - 100 |
Demonstrated evidence of exceptional achievement of course learning outcomes. |
Additional course grading information
A passing grade can only be obtained when the combined mid-semester exam mark (out of 20) and the final exam mark (out of 40)ᅠis at least 40% of the sum of available marks (that is, at least 24 out of 60 are required to obtain a passing grade). Where the overall exam mark is less than 40%, the grade will be capped at a 3 (Fail).
The marks will be rounded to the nearest whole number before the grade cut-offs are applied. For example, 84.9 will be rounded to 85 and will receive a grade of 7 and 74.4 will be rounded to 74 and will receive a grade of 5.
The course coordinator reserves the right to adjust marks up but not down.
Supplementary assessment
Supplementary assessment is available for this course.
Additional assessment information
Having Troubles?
If you are having difficulties with any aspect of the course material you should seek help. Speak to the course teaching staff.
If external circumstances are affecting your ability to work on the course, you should seek help as soon as possible. The University and UQ Union have organisations and staff who are able to help, for example, UQ Student Services are able to help with study and exam skills, tertiary learning skills, writing skills, financial assistance, personal issues, and disability services (among other things).
Complaints and criticisms should be directed in the first instance to the course coordinator. If you are not satisfied with the outcome, you may bring the matter to the attention of the School of EECS Director of Teaching and Learning.
Learning resources
You'll need the following resources to successfully complete the course. We've indicated below if you need a personal copy of the reading materials or your own item.
Library resources
Find the required and recommended resources for this course on the UQ Library website.
Learning activities
The learning activities for this course are outlined below. Learn more about the learning outcomes that apply to this course.
Filter activity type by
Please select
Learning period | Activity type | Topic |
---|---|---|
Week 1 |
Lecture |
Introduction, Network Analysis, dependent sources |
Multiple weeks From Week 2 To Week 3 |
Practical |
Operational Amplifiers |
Week 2 |
Lecture |
Operational Amplifiers |
Applied Class |
Linear Circuit Theorems |
|
Week 3 |
Lecture |
Capacitors and Inductors, RL and RC Circuits Lecture will discuss Capacitors, Inductors, RL and RC Circuits. |
Applied Class |
Capacitors and Inductors, RL and RC Circuits |
|
Multiple weeks From Week 4 To Week 5 |
Practical |
RLC Circuits Lab |
Week 4 |
Lecture |
RLC Circuits |
Applied Class |
RLC Circuits Applied Class |
|
Week 5 |
Lecture |
AC Steady State Analysis |
Multiple weeks From Week 6 To Week 11 |
Practical |
Design Challenge (weeks 1 and 2) |
Week 6 |
Applied Class |
AC Power, Frequency Response |
Week 7 |
Lecture |
Introduction to signals and systems |
Multiple weeks From Week 8 To Week 9 |
Lecture |
Laplace Transform |
Applied Class |
Laplace Transform |
|
Multiple weeks From Week 10 To Week 11 |
Lecture |
Fourier Series and Transform |
Applied Class |
Fourier Transform Design Question |
|
Multiple weeks From Week 12 To Week 13 |
Lecture |
Filter Circuits |
Applied Class |
Filter Circuits Applied Class |
Policies and procedures
University policies and procedures apply to all aspects of student life. As a UQ student, you must comply with University-wide and program-specific requirements, including the:
- Student Code of Conduct Policy
- Student Integrity and Misconduct Policy and Procedure
- Assessment Procedure
- Examinations Procedure
- Reasonable Adjustments for Students Policy and Procedure
Learn more about UQ policies on my.UQ and the Policy and Procedure Library.
You'll also need to be aware of the following policies and procedures while completing this course:
School guidelines
Your school has additional guidelines you'll need to follow for this course: